This invention relates to memory for small computer systems, and more particularly to memory devices for use with such systems having a multiplexed bidirectional address and data bus.
Microcomputer boards or other equipment using microprocessors usually employ small memory systems. A 16-bit microprocessor has a 16-bit data word which can address up to 2.sup.16 or 64K words of memory, but this amount is often not required. The semiconductor industry thus supplies memory parts that are partitioned, for example, as 4K.times.8 for microprocessor customers instead of the 32K.times.1 devices it supplies to mainframe customers. When used with a multiplexed address/data bus, such a system will use all sixteen lines for data but less than sixteen for addressing. The data on the sixteen lines will include an 8-bit low order byte and an 8-bit high order byte; usually one ".times.8" memory device or package for the low order byte and another for the high order byte. The economics of large volume, low cost manufacture of semiconductor memory dictate that the number of different types of memory devices be kept to a minimum and that each one selected for manufacture be used in very large scale. On the other hand, it is undesirable to place the burden on the user to adapt a single memory device for operation as either the high order or low order byte by complex external circuitry which he must accommodate on the board with the microprocessor and memory.
It is the principal object of this invention to provide an improved memory system for small computers, particularly microprocessors having a multiplexed address/data bus. Another object is to provide an improved memory device which will function as the high order or low order byte in a microcomputer system using a bidirectional multiplexed bus. A further object is to provide a single memory device having multiple uses.